We are seeking a Senior or Staff level Timing, Jitter and PLL Product Engineer with LabVIEW our Sunnyvale, CA based client
RESPONSIBILITIES:
- Product engineering/characterization/debug, qualification and release to production for timing devices
- Produce evaluation/characterization boards
- Drive all test bench, automation, testing activities using lab equipment
- Produce written technical reports
QUALIFICATIONS:
- *ONLY LOCAL CANDIDATES, CURRENTLY RESIDING IN THE BAY AREA WILL BE CONSIDERED
- BS or better in EE
- 5 to 10+ yrs experience in product engineering, primarily on analog related ICs
- MUST HAVE solid expertise in Timing, PLLs including jitter, differential signal timing and level parameters
- Good knowledge/experience using LabVIEW Bench automation
- Must have High speed PCB board design and layout knowledge/experience
- Solid hands-on experience in the lab with: analog/mixed signal silicon evaluation, debugging, characterization, and bring up
- Experienced in having developed test plans, executed automated tests
- Experience working with high speed scopes, TIA’s, clock generators, BERT scopes and generators
- Strong Data Analysis Experience for yield enhancement
- Independent self-starter, with strong communication skills, oral and written
ASSETS:
- Experience having done Circuit Design or FPGA programming
- Apps engineering experience
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