RESPONSIBILITIES:
- Circuit design of high speed memory I/O interfaces
- Solve challenge of circuit designs in deep submicron (28nm and smaller) CMOS bulk process
- Take designs through productization and be involved in all stages of development
- Work with cross functional teams to optimize the designs
MINIMUM REQUIREMENTS:
- BSEE, MSEE
- Candidate must have 5+ years of well rounded high speed IO circuit design and development experience.
- A team player with good communication skills
- Circuit design of various components of High speed multi Gb/s I/O interfaces
- System level timing budgets, specs and analysis
- In-depth understanding of deep submicron cmos process and circuit design issues
- Familiarity with device reliability, ESD and Latchup requirements
- Supervise layout development and understand all ESD/Latchup, reliability rules
- Broad circuit design and implementation knowledge with significant depth
- Knowledge of package substrate, board design and power delivery is a plus.
- Working knowledge of Cadence custom design tools, various circuit simulators like Hspice, XA, FineSim, Spectre
- Working knowledge of Verilog, Nanotime, Matlab is plus
- Hands on with Lab test and measurement equipment is a plus
EOE
Interested in talking with us? Please apply directly at NVIDIA.COM
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